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Engineer, Design Verification

Renesas Electronics

Full time On-site
Location
Bangalore
Work mode
On-site
Salary
₹12L – ₹24L a year estimatetypical for IT Jobs in Bangalore, 241 posts
Posted 5 days ago

Job description

Job Description

  • Be a part of end‑to‑end verification execution for SOC owning complex digital IP’s and subsystems from specification to sign‑off
  • Define and drive IP‑level verification strategies, including test plans, coverage models, and closure criteria
  • Develop scalable, reusable UVM‑based verification environments for IP and subsystem verification
  • Lead functional, code, assertion, and cross‑coverage closure, ensuring high‑quality sign‑off with clear metrics
  • Apply AI/ML‑assisted verification techniques to accelerate coverage convergence, identify stimulus gaps, and optimize regression efficiency
  • Drive constraint random and directed test methodologies for thorough protocol, corner‑case, and stress verification
  • Collaborate with RTL, Architecture, Emulation, and SoC Verification teams to ensure seamless IP integration
  • Review IP specifications and work with architects to translate requirements into robust verification plans and checkers
  • Develop and deploy advanced checkers, scoreboards, assertions (SVA), and protocol monitors
  • Work with EDA vendors to evaluate and adopt next‑generation verification, coverage, and analytics tools
  • Support Gate‑Level Simulation (GLS), low‑power verification, and post‑silicon debug when required.
  • Ensure IP deliverables meet quality, schedule, and reusability expectations for SoC integration.

Tags

IT Jobs

Job market insights

₹12L – ₹24L advertised yearly salary for IT Jobs in Bangalore (middle half of 241 posts that show a salary; median ₹18L)
5 more open jobs at Renesas Electronics

From live job posts on CoreHRx, updated 21 Oct 2026. Skill figures count posts that list their skills; salary figures only posts that show a salary.

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