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DFT - Full Time

Kandou AI Verified employer

Full time
Experience
12+ years
Location
Hyderabad
Work mode
Not stated
Salary
₹8.5L – ₹22L a year estimatetypical for IT Jobs in Hyderabad, 71 posts
Posted 1 month ago Last checked 3 hr ago

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Role at a glance

You will
  • Lead DFT activity for the next generation products
  • Driving the DFT architectures, methodologies and tool flows for complex multi-million gate designs with Analog/high bandwidth SerDes, DDR…
  • Closely working with Physical implementation team to define timing constraints in test modes and helping to converge for successful tapeout
Experience
12+ years
Education
Bachelor's degree

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Job description

Location: Hyderabad
Department: Engineering

Key Responsibilities:

  • Lead DFT activity for the next generation products

  • Driving the DFT architectures, methodologies and tool flows for complex multi-million gate designs with Analog/high bandwidth SerDes, DDR, PCIe designs

  • Closely working with Physical implementation team to define timing constraints in test modes and helping to converge for successful tapeout

  • Good understanding of ATE, knowledge of probe and final test bring up debug issues and drive the test engineering team for successful Silicon bring up and test program development

  • Define the test plan by closely working with the design teams and drive the pattern development of functional/structural tests for final/wafer test program

  • Closely working with the cross functional teams to bring up device qualification solution for HTOL

  • Drive lab bench silicon debug to understand ATE bring up issues

Skills:

  • Excellent communication skills, and strong team player with can do type of attitude

  • Mentoring the team members

  • Excellent debugging skills

  • Process oriented to drive automation to help increase productivity and quality

Qualifications:

  • 12+ years of DFT experience including architecture specification, implementation, test pattern development, and simulation

  • Proven track record of delivering DFT solution to complex designs

  • Experience working with IJTAG methodologies, understanding device functionality

  • Experience with hierarchical MBIST insertion, hierarchical scan insertion and scan compression methodologies

  • Experience in ATPG pattern generation for different kinds of fault models, fault coverage analysis and converging to high coverage metrics

  • Strong debug capabilities in simulating patterns with timing

  • Experience in defining test mode constraints and analyzing the timing reports

  • Experience with industry standard EDA tools for DFT, timing, and simulation

  • Good knowledge of System Verilog

  • Experience with chiplet based designs is a plus

Education:

  • Bachelor of Engineering in Electronics and Electrical Engineering, Computer Engineering or similar fields (equivalent or higher)

Key skills

Soft skills

CommunicationTeamwork

Job market insights

₹8.5L – ₹22L advertised yearly salary for IT Jobs in Hyderabad (middle half of 71 posts that show a salary; median ₹15L)
21 more open jobs at Kandou AI

Most IT Jobs posts in Hyderabad ask for 3–6 years of experience (47% of 1125 that say).

Hiring most for IT Jobs in Hyderabad

  • Salesforce50 open jobs
  • JPMorgan Chase36 open jobs
  • Kyndryl25 open jobs

From live job posts on CoreHRx, updated 7 Nov 2026. Skill figures count posts that list their skills; salary figures only posts that show a salary.

Questions about this job

What is the salary for this DFT - Full Time job?

The post does not state the pay. As an estimate, comparable posts on CoreHRx advertise ₹8.5L – ₹22L a year (typical for IT Jobs in Hyderabad, 71 posts).

How much experience does this job need?

The post asks for 12 Yrs experience.

Where is this job based?

In Hyderabad.

What kind of job is this?

It is a full time job.

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