Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
You are a passionate and driven EMIR Engineer with a strong foundation in EMIR analysis and signoff flows, PDN implementation, and a proven ability to independently own and deliver complex designs. With at least 5 years of hands-on experience in advanced technology nodes such as 7nm, 5nm, or even 3nm, you thrive in fast-paced, innovative environments and are eager to tackle new technical challenges. Your expertise spans the entire Power Integrity spectrum,from PDN design, Static & Dynamic Signal/Power EM & IR Drop analysis with or without simulation vectors, Peak Current Analysis, EMIR ECO generation, and full SoC Power Integrity signoff.
What You'll Be Doing:
Independently own and drive full EMIR analysis and signoff closure for advanced process nodes (7nm/5nm/3nm), ensuring successful tape-outs.
Execute PDN implementation, Static & Dynamic Signal/Power EM & IR Drop analysis with or without vectors, Peak Current Analysis, EMIR ECO generation, and full SoC Power Integrity signoff to meet stringent performance and power targets. Perform block-level, sub-system level and full-chip PDN implementation, EMIR analysis, and trade-off between EMIR signoff closure and timing closure activities. Collaborate with cross-functional teams across geographies to resolve complex design challenges and ensure design quality and schedule adherence.
Utilize and optimize Synopsys EDA tools, including Redhawk, Redhawk-SC, PrimeRail and PrimePower, to deliver state-of-the-art silicon solutions.
Develop and maintain automation scripts in Python, PERL, TCL, or other relevant languages to streamline design flows and improve efficiency.
Contribute to the continuous improvement of design methodologies and best practices, sharing insights and mentoring junior engineers as needed.
The Impact You Will Have:
Accelerate the delivery of high-performance, low-power silicon solutions that power next-generation technology platforms worldwide.
Enable Synopsys customers to achieve first-pass silicon success through robust and innovative PDN implementation, EMIR analysis & signoff closure.
Drive technical excellence and best practices within the team, influencing the future direction of EMIR signoff methodologies at Synopsys.
Foster a collaborative and inclusive culture by working seamlessly with global teams and sharing technical expertise.
Contribute to Synopsys’ leadership in EDA tools adoption, providing valuable feedback to enhance product offerings and customer satisfaction.
Support strategic customer engagements and help expand Synopsys' presence in the semiconductor ecosystem through successful project outcomes.
What You'll Need:
Bachelor’s or Master’s degree (BE/BTech/MTech or equivalent) in Electronics, Electrical Engineering, or a related field.
5+ years of relevant experience in EMIR analysis & signoff closure, and particularly in advanced technology nodes (7nm/5nm/3nm). PDN implementation experience will be preferred. Comprehensive hands-on experience with EMIR flows, including PDN design, Static & Dynamic Signal/Power EM & IR Drop analysis with or without vectors, Peak Current Analysis, EMIR ECO generation, and full SoC Power Integrity signoff.
Proficiency with Synopsys EDA tools such as Redhawk, Redhawk-SC, PrimeRail, and PrimePower.
Strong scripting and automation skills using Python, PERL, TCL, or similar languages.
Solid understanding of EMIR, power integrity, reliability concepts, and power-planning techniques for both block-level and full-chip designs.
Exposure to high-frequency design and low-power design methodologies.
Benefits:
Comprehensive medical and healthcare plans that work for you and your family.
In addition to company holidays, we have ETO and FTO Programs.
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
Save for your future with our retirement plans that vary by region and country.
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Questions about this job
What is the salary for this SOC Engineering, Senior Staff Engineer (EMIR) job?
The post does not state the pay. As an estimate, comparable posts on CoreHRx advertise ₹14L – ₹25L a year (typical for IT Jobs in Bangalore, 286 posts).
How much experience does this job need?
The post asks for 5 Yrs experience.
Where is this job based?
In Bangalore.
What kind of job is this?
It is a full time job.
How do I apply?
You apply on Synopsys' website. CoreHRx takes you there after you sign in.
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SOC Engineering, Senior Staff Engineer (EMIR)
Bangalore
1
Full time
5+ years
₹14L – ₹25L a year (estimate, typical for IT Jobs in Bangalore, 286 posts)